PERFORMANCE COMPARISON REVIEW OF 8-3 COMPRESSOR ON FPGA

Compressors are commonly utilized in multipliers to cut down partial products in a
parallel manner. Its main usage in this project is to go beyond the limit of fabrication
technology to improve the computer performance. 2:1 compressors (half adder), 3:2
compressors (full adder), and 4:2 compressors should be well understood as it is the
fundamental for building higher order compressors. In this paper, a 7-3, 8-3, 8-4, 9-3,
and 9-4 researched compressors design either consisted of adder circuits or multiplexer
circuits will be discussed and compared in terms of number of logic gates used, cell
area and power delay product (PDP) in order to find the best method to implement the
8-3 compressor design.