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Design Common Mode Logic (CML) Frequency Divider In CMOS Process Technology

Mastura binti Omar, Mastura (2009) Design Common Mode Logic (CML) Frequency Divider In CMOS Process Technology. Universiti Teknologi Petronas. (Unpublished)

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The objective of this project is to design current mode logic (CML) frequency divider in CMOS technology. The current spikes that occur during transition between tacking and latch mode in transistor will degrade the performance of the frequency divider. The parasitic capacitances that exist in two transistor of tracking circuit directly contribute to the latch delay. The fundamental of this project is to understand the basic operation of CML of D Flip-flop based frequency divider.

Item Type: Final Year Project
Subject: T Technology > TK Electrical engineering. Electronics Nuclear engineering
Divisions: Sciences and Information Technology
Depositing User: Users 5 not found.
Date Deposited: 11 Jan 2012 12:24
Last Modified: 19 Jan 2017 15:48
URI: http://utpedia.utp.edu.my/id/eprint/1576

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