DESIGN OF LOW NOISE AMPLIFIER (LNA) IN CMOS PROCESS TECHNOLOGY

This report describes the design and simulation of low noise amplifier (LNA) using
AMI06 CMOS process technology. LNA is an amplifier used in communication systems
to amplify a very weak input signal while reducing the amount of noise. The core
method in designing LNA is to choose the most suitable topology and operating
frequency that fit the design requirements. The design proceeds with the calculation of
the LNA parameters which are source inductor drain inductor, gate inductor, width of
the transistors, bias resistors and block capacitors. Global Positioning System (GPS) and
Ultra Wideband (UWB) LNAs have been successfully designed and simulated using
Cadence Spectra RFIC Design Software. Simulation results showed that the GPS LNA
can amplify weak input signal at frequency range from 1.0 to 1.8 GHz. The LNA
obtained gain from 21.348 dB to 25.513 dB. This LNA has achieved noise figure less
than 2.518 dB and the power consumption is 16.5mW. For the UWB LNA the frequency
range is from 3.1 to 5 GHz which covers the lower band of Ultra Wideband (UWB)
technology. The UWB LNA achieved gain from 21.348 dB to 25.513 dB with noise
figure less than 3.280 dB.