MOHD SAPLI, NUR SY AHADAH (2008) Comparitive Study On Multiplier Algorithms using Verilog HDL. [Final Year Project] (Unpublished)
2008 Bachelor - Comparative Study On Multiplier Algorithms Using Verilog HDL.pdf
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Abstract
Multipliers are used in many applications especially in computers. A personal
computer (PC) utilizes multipliers to perform calculations. Thus, having a multiplier
with great speed will definitely boost the performance of a PC. Based on this, the
purpose of the Final Year Project is to perform a comparison study on multiplier
algorithms using Verilog HDL. Four multipliers have been selected to be the subject
of study. The multipliers are Ripple Carry multiplier, Carry Save multiplier, Wallace
multiplier and finally the Dadda multiplier. The propagation delay of each multiplier
is determined to check their performance in terms of speed. The outcome of this
project has showed that, among these four multipliers, Carry Save multiplier has
exhibited the smallest amount of propagation. Therefore, it is the fastest multiplier out
of the four that are studied whereas Dadda multiplier shows the least number of logic
elements used up until 6-bit multiplication process.
Item Type: | Final Year Project |
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Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
Departments / MOR / COE: | Engineering > Electrical and Electronic |
Depositing User: | Users 2053 not found. |
Date Deposited: | 30 Sep 2013 16:55 |
Last Modified: | 25 Jan 2017 09:45 |
URI: | http://utpedia.utp.edu.my/id/eprint/7841 |