Optimization of FPGA Based Neural Network Processor

Neural information processing is an emerging new field, providing an alternative
form of computation for demanding tasks such as pattern recognition problems
which are usually reserved for human attention. Neural network computation i s
sought after where classification of input data is difficult to be worked out using
equations or sets of rules.
Technological advances in integrated circuits such as Field Programmable Gate
Array (FPGA) systems have made it easier to develop and implement hardware
devices based on these neural network architectures. The motivation in hardware
implementation of neural networks is its fast processing speed and suitability in
parallel and pipelined processing.
The project revolves around the design of an optimized neural network processor.
The processor design is based on the feedforward network architecture type with
BackPropagation trained weights for the Exclusive-OR non-linear problem.
Among the highlights of the project is the improvement in neural network
architecture through reconfigurable and recursive computation of a single hidden
layer for multiple layer applications. Improvements in processor organization were
also made which enables the design to parallel process with similar processors.
Other improvements include design considerations to reduce the amount of logic
required for implementation without much sacrifice of processing speed.