STUDY OF GATE TURN OFF THYRISTOR STRUCTURE FOR POWER CONTROL APPLICATION USING SIMULATION

The turn-on and turn-off losses in a GTO thyristor must be properly accounted for
because they can comprise upwards of 60% of the total losses. If a research can be done
to remove the defect and reduce the losses and improved the performance of the GTO
thyristor, it will be a great breakthrough to the semiconductor field. This report represents
the study on the Gate Turn- Off (GTO) Thyristor using simulation software. This project
which was done in 2 semesters (July 2006 semester and January 2007 semester) is the
study on the method to improve the performance of the GTO thyristor by reducing it
losses. During the first part of the project, familiarization with the TCAD SILVACO
ATHENA and ATLAS is done in order to continue doing a critical evaluation to the
device; furthermore this step is very important during the extraction process of the
electrical performance for the conventional device. For the second semester, the review
process of the researches done by other people began to takeplace. Each of the reference
and research found will be carefully compared. The best design or steps is then being
chosen to be adopted in the project.