Dan, Mohammad Rafi (2007) Behavioural Codes of Clock Integrated Circuit. [Final Year Project] (Unpublished)
2007 -Behavioural Codes Of Clock Integrated Circuit.pdf
Download (982kB)
Abstract
We are now submerging into a world where big-board-circuits been replaced
by integrated circuits. So to goes into this race, I had been given a task to
develop a Very-Large-Scale Integrated (VLSI) Circuit that is capable to run
and display a real clock on various displays such as computer monitor or any
specific display. This built I.C. will receive a clock signal wave from a wide
range of frequencies and able to compute exact time up to milliseconds. It
shall able not just to display correct local time and date but also can be reset
and display time and date for various locality. The first important step is to
master and develop the behavioural code of this clock system. There are two
choices of codes, which are Verilog and Verilog Hardware Description
Language (VHDL). Only then this develop system will be implemented to the
Field Programmable Gate Array (FPGA). A FPGA is a semiconductor device
containing programmable interconnections. This FPGA should be connected
to a computer clock simulator and run the Clock Integrated Circuit built.
Item Type: | Final Year Project |
---|---|
Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
Departments / MOR / COE: | Engineering > Electrical and Electronic |
Depositing User: | Users 2053 not found. |
Date Deposited: | 24 Oct 2013 14:46 |
Last Modified: | 25 Jan 2017 09:45 |
URI: | http://utpedia.utp.edu.my/id/eprint/9674 |