Acceleration of the Presenter Detection Algorithms Using FPGA as a Coprocessor for Effective Video Recording

In a video recording of a presentation session, presenter detection is required in order for the camera to have the ability to track the face of the presenter. High computation power is required to perform video processing for the detection of the presenter. Instead of using a normal embedded to perform real time video processing, Field Programmable Gate Array (FPGA) can be used as a coprocessor to perform complex computation algorithm. FGPA coprocessors can be used with standard microprocessor or microcontroller to handle complex tasks and subsequently improve the performance.