UTPediaA/L Arulnathan, Jonathan (2018) VCO DEVELOPMENT USING 130nm CMOS TECHNOLOGY. [Final Year Project]
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22379 Jonathan Arulnathan FYP Final Report.pdf
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Abstract
This dissertation focuses on the simulation of a VCO that is optimized for its phase noise properties by utilizing Cadence tools. Besides, a detailed study on the main causes of phase noise in a VCO and techniques of improving the VCO’s phase noise was also conducted in the midst of VCO design.
| Item Type: | Final Year Project |
|---|---|
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Departments / MOR / COE: | Engineering > Electrical and Electronic |
| Depositing User: | Mr Ahmad Suhairi Mohamed Lazim |
| Date Deposited: | 18 Mar 2019 11:41 |
| Last Modified: | 18 Mar 2019 11:41 |
| URI: | http://utpedia.utp.edu.my/id/eprint/18949 |
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