REAL-TIME HORN-SCHUNCK OPTICAL FLOW HARDWARE ARCHITECTURE FOR HIGH ACCURACY MOTION ESTIMATION

The optical flow constraint equation of Horn-Schunck (OFCE-HS) is an algorithm
used to compute motion estimation from the apparent motion of image sequences. To
achieve real-time performance and high accuracy estimation for real-time system
especially for machine vision application, numerous efforts have been put to
implement the OFCE-HS algorithm into hardware. However, so far there has not been
a single solution reported to have achieved both real-time performance and high
estimation accuracy. Therefore, the work reported in this thesis was set out with an
objective to come up with a hardware solution to address the real-time and accuracy
problem aforementioned. The objective was achieved by implementing high
throughput hardware architecture that is able to support the high iteration (i.e. a
minimum of fifty iterations) required by the OFCE-HS algorithm to achieve
acceptable accuracy. In addition to the pipeline processing, two partitioning
techniques were successfully implemented; first, on the frame of the image sequences
and second, on the loop of the iterations. The optimized OFCE-HS hardware
architecture was implemented on the FPGA Xilinx Spartan-3A DSP 1800A.