IMAGE PROCESSING ALGORITHMS ON FPGA

The objective of this project is to construct a real time hardware image processing
system which based on Field Programmable Gate Array (FPGA). The chosen image
processing algorithms are implemented on two systems which are Color Filtering
System and Edge Detection System. This project utilizes Altera DE2 development
board empowered by Cyclone il FGPA pair with 1.3 Mega pixel CMOS camera from
Terasik Technologies. Verilog HDL is chosen as the hardware programming
language for these systems and its compiled using Quartus II program. In order to
verify the functionality of the hardware systems, Matlab 7.1 (as an engineering tool)
is use to simulate the expected output for both system.